The present invention relates to solid-state imaging apparatus, and more particularly relates to a solid-state imaging apparatus adapted to be capable of avoiding an effect of fluctuation in power supply or GND occurring due to the rendering of a concurrent reset operation of all pixels in a readout pixel region.
As a pixel of the pixel section to be used in a solid-state imaging apparatus having a concurrent shutter (also referred to as global shutter) function, one constructed as shown in FIG. 1 has been disclosed for example in Japanese Patent Application Laid-Open hei-11-261896. FIG. 1 includes: 1, a photoelectric conversion means such as a photodiode for receiving light for a predetermined time to accumulate photoelectric charge and effect its photoelectric conversion; 2, a memory means for retaining photoelectric charge of the photoelectric conversion means 1; 3, a transfer means for transferring photoelectric charge of the photoelectric conversion means 1 to the memory means 2; 4, a reset means for resetting the memory means 2 to the potential of a power supply; 5, a discharging means for resetting the photoelectric conversion means 1 to the potential of a power supply; and 6, a read means for reading electric charge of the memory means 2. These means constitute a unit pixel 7. A plurality of unit pixels 7 having such construction are then two-dimensionally arranged to constitute a pixel section. It should be noted that what is denoted by 21 is a vertical signal line for outputting signal read out by the read means 6.
Also referring to FIG. 1, φ TX1, φ RES(n), φ TX2, and φ SEL(n) are a transfer control signal, reset control signal, discharging control signal, and read control signal, respectively, for controlling ON/OFF of the transfer means 3, reset means 4, discharging means 5, and read means 6. It should be noted that suffix (n) of φ RES(n) and φ SEL(n) represents the location of row, and these control signals are outputted row by row of the pixel section from a vertical circuit (not shown).
An operation of the pixel section using the pixel shown in FIG. 1 will now be described with reference to a timing chart shown in FIG. 2. As shown in FIG. 2, the discharging control signal φ TX2 is driven to H level concurrently for all pixels so that a concurrent discharging operation of all pixels is started by the discharging means 5. After passage of a predetermined time, the discharging control signal φ TX2 is brought to L level concurrently for all pixels so that a concurrent discharging/reset operation of all pixels is completed by the discharging means 5 (time point t1) and exposure of all pixels is started.
After passage of a predetermined exposure time, at the timing of concurrent transfer of all pixels, the transfer means 3 of all pixels are concurrently turned ON by the transfer control signal φ TX1. The photoelectric charges accumulated at the photoelectric conversion means 1 are thereby concurrently transferred to the memory means 2 (time point t2). In other words, an exposure is ended. Here, in the timing chart shown in FIG. 2, a period indicated as Tint is an actual exposure period. Next after the end of the exposure, the read means 6 controlled by the read control signal φ SEL(n) is used to start read of signal level sequentially from the first row. It should be noted that, Vdd, Gnd in FIG. 2 indicate fluctuation in power supply (Vdd) and Gnd at the time of the concurrent discharging/reset operation by the discharging control signal φ TX2 and at the time of the concurrent transfer operation by the transfer control signal φ TX1.